DOI: 10.1109/JSSC.2024.3424264

Paper Summary:

Title: A 1.8-V GPIO With Design-Technology-Reliability Co-Optimization in Sub-3-nm GAA-NS Technology

Author(s): Chen, Wen-Chieh (author);Chen, Shih-Hung (author);Huang, Man-Ching (author);Chang, Shu-Wei (author);Hellings, Geert (author);Groeseneken, Guido (author)

Year: 2025

DOI: 10.1109/JSSC.2024.3424264

URL: https://doi.org/10.1109/JSSC.2024.3424264

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