DOI: 10.1109/TVLSI.2023.3243027

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DOI: 10.1109/TVLSI.2023.3243027

Paper Summary:

Title: A Reliable and High-Speed 6T Compute-SRAM Design With Dual-Split-V _DD Assist and Bitline Leakage Compensation

Author(s): Wang, Yuqi (author);Zhang, Shen (author);Li, Yifei (author);Chen, Jian (author);Zhao, Wenfeng (author);Ha, Yajun (author)

Year: 2023

DOI: 10.1109/TVLSI.2023.3243027

URL: https://doi.org/10.1109/TVLSI.2023.3243027

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2025-05-05, ∼497👍, 0💬

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